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High-Density Through Silicon Vias for 3-D LSIs
295
Citations
21
References
2009
Year
EngineeringSilicon On InsulatorHigh DensityWafer Scale ProcessingAdvanced Packaging (Semiconductors)Nanoelectronics3-D LsisElectronic PackagingMaterials EngineeringMaterials ScienceElectrical Engineering3D Ic ArchitectureSemiconductor Device FabricationMicroelectronicsTsv TechnologyMicrofabricationApplied PhysicsPolycrystalline Silicon3D Integration
High‑density through‑silicon vias are essential for fabricating three‑dimensional large‑scale integration. The authors developed polycrystalline silicon and tungsten/poly‑Si TSV technologies for 3‑D integration. Poly‑Si TSVs were formed by low‑pressure CVD of phosphorus‑doped poly‑Si into thermally oxidized trenches, while W/poly‑Si TSVs were created by depositing tungsten via atomic layer deposition onto the poly‑Si liner. Using poly‑Si TSVs, the authors successfully fabricated 3‑D microprocessor, memory, image sensor, and artificial retina test chips.
High density through silicon via (TSV) is a key in fabricating three-dimensional (3-D) large-scale integration (LSI). We have developed polycrystalline silicon (poly-Si) TSV technology and tungsten (W)/poly-Si TSV technology for 3-D integration. In the poly-Si TSV formation, low-pressure chemical vapor deposition poly-Si heavily doped with phosphorus was conformally deposited into the narrow and deep trench formed in a Si substrate after the surface of Si trench was thermally oxidized. In the W/poly-Si TSV formation, tungsten was deposited into the Si trench by atomic layer deposition method after the poly-Si deposition, where poly-Si was used as a liner layer for W deposition. The 3-D microprocessor test chip, 3-D memory test chip, 3-D image sensor chip, and 3-D artificial retina chip were successfully fabricated by using poly-Si TSV.
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