Charge Trapping Reliability
Charge Trapping Reliability is a semiconductor reliability metric that quantifies the susceptibility of a device to performance degradation due to the accumulation of charge carriers in defect states within the dielectric or at interface regions under electrical and environmental stress.
78
Publications
2.8K
Citations
468
Authors
118
Institutions
Publications per year
2017–2026
21
Parents
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Novel read disturb failure mechanism induced by FLASH cycling
Adam Brand, Kehuey Wu, Shijie Pan et al. · 1993 · 88 citations
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118
IMEC
Leuven, Belgium
9 h-index
61 publications
2.1K citations
KU Leuven
Leuven, Belgium
5 h-index
12 publications
568 citations

Indian Institute of Technology Bombay
Mumbai, India
4 h-index
18 publications
484 citations
Applied Materials (United States)
Santa Clara, United States
4 h-index
26 publications
633 citations
Samsung (South Korea)
Seoul, South Korea
4 h-index
23 publications
877 citations
Macronix International (Taiwan)
Hsinchu, Taiwan
3 h-index
28 publications
535 citations
IBM (United States)
Armonk, United States
3 h-index
16 publications
1.9K citations
Intel (United States)
Santa Clara, United States
3 h-index
15 publications
1.6K citations
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10 publications · 528 citations
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10 publications · 307 citations
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6 publications · 165 citations
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5 publications · 154 citations
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