Charge Trapping Reliability

Charge Trapping Reliability is a semiconductor reliability metric that quantifies the susceptibility of a device to performance degradation due to the accumulation of charge carriers in defect states within the dielectric or at interface regions under electrical and environmental stress.

78

Publications

2.8K

Citations

468

Authors

118

Institutions

Publications per year

2017–2026

21

Authors

468

  1. GG
    G. Groeseneken

    IMEC, Belgium

    6 publications · 299 citations

    6

    h-index

  2. RD
    R. Degraeve

    IMEC, Belgium

    5 publications · 288 citations

    5

    h-index

  3. BK
    B. Kaczer

    IMEC, Belgium

    5 publications · 110 citations

    5

    h-index

  4. HM
    H.E. Maes

    IMEC, Belgium

    4 publications · 277 citations

    4

    h-index

  5. CS
    C. Sandhya

    Indian Institute of Technology Bombay, India

    4 publications · 103 citations

    4

    h-index

1–5 of 468

Venues

  1. IEEE Electron Device Letters

    10 publications · 528 citations

    10

    h-index

  2. IEEE Transactions on Electron Devices

    10 publications · 307 citations

    9

    h-index

  3. Microelectronics Reliability

    6 publications · 165 citations

    6

    h-index

  4. Microelectronic Engineering

    5 publications · 154 citations

    5

    h-index

  5. Applied Physics Letters

    3 publications · 105 citations

    3

    h-index

1–5