Investigation on the Lateral Trap Distributions in Nanoscale MOSFETs During Hot Carrier Stress

Abstract

In this letter, the lateral trap distributions in planar and FinFET devices are experimentally studied under various bias stress conditions of hot-carrier degradation (HCD). In contrast to the traditional understanding that the generated traps are crowded near the drain region during hot-carrier stress, it is found that the peak of the trap distribution profile will gradually move closer to the source region with the increase in V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> stress. The results suggest that the electron-electron scattering and multiple vibrational excitation are important mechanisms for the lateral trap distributions during HCD stress, which is helpful for the physical understanding of HCD.