IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018 · 26 citations · 38 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesDevice ReliabilityDevice ScalingDevice SimulationIntegrated Circuit DesignNoise In Semiconductor DevicesSemiconductor ReliabilityAnalog-to-digital ConversionDevice VariabilityLarge-area ElectronicsNoise In Metal-oxide-semiconductor Field-effect TransistorsRandom NoiseRandom Telegraph NoiseTransistor ScalingTransistor Sizing
Advanced scaling and the introduction of new materials in the metal-oxide-semiconductor field-effect transistor (MOSFET) raise concerns about its reliability. Several degradation mechanisms, depending on operating conditions and time, can cause a significant change of the transistor parameters. The transistor area plays a large role when it comes to aging. In large-area MOSFETs, aging appears deterministic, while in small-area devices it is stochastic and convoluted with random telegraph noise. This is analogous to the time-zero random variability, which also reduces as the transistor gate area increases. The scope of this paper is to extend the knowledge of the time-dependent random variability as a function of MOSFET gate area scaling. The goal is to aid the designers in transistor sizing toward a more reliable design. As an example, the impact of time-dependent random variability is illustrated for an analog-to-digital converter.
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A low-noise self-calibrating dynamic comparator for high-speed ADCs
Masaya Miyahara, Yusuke Asada, Daehwa Paik et al. · 2008 · 414 citations
Engineering, Computer Engineering, Electrical Engineering +17