Transistor Scaling
Transistor Scaling is a methodological framework in power amplifier design that systematically reduces the physical dimensions and operating parameters of transistors to enhance efficiency, bandwidth, and integration density while maintaining or improving output power and linearity.
590
Publications
36.1K
Citations
2.3K
Authors
476
Institutions
Publications per year
2017–2026
154
Parents
590
Design challenges of technology scaling
Shekhar Borkar · IEEE Micro · 1999 · 1.2K citations
Engineering, Computer Engineering, Electrical Engineering +17
1–5 of 590
2.3K
Massachusetts Institute of Technology, United States
6 publications · 313 citations
6
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6
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6
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6
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5
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1–5 of 2.3K
476
Intel (United States)
Santa Clara, United States
23 h-index
170 publications
29.5K citations
IBM (United States)
Armonk, United States
20 h-index
94 publications
11.5K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
19 h-index
55 publications
9.6K citations
Georgia Institute of Technology
Atlanta, United States
15 h-index
44 publications
2.4K citations
Stanford University
Stanford, United States
13 h-index
38 publications
4K citations
Purdue University West Lafayette
West Lafayette, United States
12 h-index
30 publications
2.2K citations
University of California, Santa Barbara
Santa Barbara, United States
11 h-index
39 publications
1.6K citations
IMEC
Leuven, Belgium
11 h-index
103 publications
5.9K citations
1–8 of 476
49 publications · 2.7K citations
25
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18 publications · 1.8K citations
14
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13 publications · 486 citations
12
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13 publications · 477 citations
12
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10 publications · 312 citations
10
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1–5