Bertrand Parvais

Planar Bulk MOSFETs Versus FinFETs: An Analog/RF Perspective

V. Subramanian, Bertrand Parvais, Jonathan Borremans et al. · IEEE Transactions on Electron Devices · 2006 · 151 citations

Engineering, Electrical Engineering, Analog Electronics +16

3D stacked IC demonstration using a through Silicon Via First approach

J. Van Olmen, A. Mercha, Guruprasad Katti et al. · 2008 · 141 citations

Engineering, Computer Engineering, Electrical Engineering +17

Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession

T. Chiarella, Liesbeth Witters, A. Mercha et al. · Solid-State Electronics · 2010 · 120 citations

Engineering, Computer Engineering, Electrical Engineering +14

Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology

Dmitry Yakimets, M. Garcia Bardon, Doyoung Jang et al. · 2017 · 118 citations

Engineering, Computer Engineering, Electrical Engineering +17

Physical Model of Low-Temperature to Cryogenic Threshold Voltage in MOSFETs

Arnout Beckers, Farzan Jazaeri, Alexander Grill et al. · IEEE Journal of the Electron Devices Society · 2020 · 108 citations · Full text

Engineering, Electrical Engineering, Microelectronics +15