Liesbeth Witters

Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession

T. Chiarella, Liesbeth Witters, A. Mercha et al. · Solid-State Electronics · 2010 · 120 citations

Electrical Engineering, Physical Design (Electronics), Engineering +8

SiGe Channel Technology: Superior Reliability Toward Ultrathin EOT Devices—Part I: NBTI

J. Franco, B. Kaczer, Philippe Roussel et al. · IEEE Transactions on Electron Devices · 2012 · 102 citations

Reliability, Electrical Engineering, Engineering +14

Impact of single charged gate oxide defects on the performance and scaling of nanoscaled FETs

J. Franco, B. Kaczer, M. Toledano-Luque et al. · 2012 · 91 citations

Engineering, Scaling Rule, Oxide Defect +16

Challenges and opportunities in advanced Ge pMOSFETs

Eddy Simoen, Jérôme Mitard, Geert Hellings et al. · Materials Science in Semiconductor Processing · 2012 · 79 citations

Low-power Electronics, Electrical Engineering, Engineering +6

Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography

M.J.H. van Dal, Nadine Collaert, G. Doornbos et al. · 2007 · 79 citations

Engineering, Integrated Circuits, Interconnect (Integrated Circuits) +18