Critical analysis of 14nm device options

P. Oldiges, R. Muralidhar, P. Kulkarni, C-H. Lin, K. Xiu, Dechao Guo, Mohit Bajaj, Ninad D. Sathaye

2011 · 11 citations · 11 references

Concepts

Abstract

Modeling challenges and solutions for silicon based high performance device options at the 14nm node are presented. A variety of devices are being considered, using a variety of methods to analyze the devices objectively. Partially depleted silicon on insulator (PDSOI) devices are compared against extremely thin (ETSOI) and FinFET devices.

References

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