IEEE Electron Device Letters · 2004 · 13 citations · 9 references
EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesDevice CharacterizationDevice ModelingHigh-frequency Semiconductor DevicesIntegrated Circuit DesignOxide SemiconductorsShort-channel EffectsCapacitance-voltage CharacteristicsCapacitance-voltage CharacterizationCapacitance-voltage MeasurementsEquivalent Oxide ThicknessGate Oxide Thickness EffectsGate OxidesLumped-element ApproximationMetal-oxide-semiconductor Field-effect Transistor Modeling
This letter demonstrates that the conventional two-element lumped model can provide valid capacitance-voltage (C-V ) characteristics for gate oxides with large tunneling current, if the gate length is reduced. The two-element models generally suffer from severe distortion of C-V due to tunneling current, resulting in poor oxide thickness extraction. The distortion can be suppressed using high frequencies in series model or using short gate lengths in parallel model. Considering instrument limits and manufacturability, however, the parallel model is more desirable. The distortion can be completely suppressed up to 10/sup 4/ A/cm/sup 2/ of tunneling current, using gate lengths shorter than 0.2 /spl mu/m in parallel model.
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