Completely Surface-Potential-Based Compact Model of the Fully Depleted SOI-MOSFET Including Short-Channel Effects

Abstract

The reported circuit simulation model Hiroshima University semiconductor technology academic research center IGFET model silicon-on-insulator (HiSIM-SOI) for the fully depleted SOI-MOSFET is based on a complete surface-potential description. Not only the surface potential in the MOSFET channel, but also the potentials at both surfaces of the buried oxide are solved iteratively, which allows including of all relevant device features of the SOI-MOSFET explicitly and in a physically correct way. In particular, an additional parasitic electric field, induced by the surface-potential distribution at the buried oxide, has to be included for accurate modeling of the short-channel effects. The total iteration time for surface potential calculation with HiSIM-SOI is under most bias conditions only a factor 2.0 (up to a factor 3.0 for some bias conditions) longer than for the bulk-MOSFET HiSIM model, where just the channel surface potential is involved. It is verified that HiSIM-SOI reproduces measured current-voltage (I-V) and 1/f noise characteristics of a 250-nm fully depleted SOI technology in the complete operating range with an average error of 1% and 15%, respectively. Stable convergence of HiSIM-SOI in the circuit simulation is confirmed