Al2O3 Based Flash Interpoly Dielectrics: a Comparative Retention Study

Abstract

In this work the authors present a thorough investigation of charge retention in memory cells with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> interpoly dielectric (IPD) stacks, using a fully planar stacked gate memory cell with self-aligned floating gate. This structure is interesting for future area scaling and allows high-k materials and metal gates to be easily introduced. It is shown that the retention behaviour is determined by room temperature charge loss and directly correlated to the properties of the IPD layer. From a comparison between different thicknesses, gate materials and post-deposition anneals (PDA) of the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> layer, it is also found that the bottom oxide thickness is the key parameter for retention, while the use of a poly gate and a low PDA temperature yield further improvement