IEEE Transactions on Electron Devices · 1989 · 14 citations · 9 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCarrier TransportCharge Carrier TransportCurrent-voltage CharacteristicsMetal-oxide-semiconductor Field-effect TransistorsSemiconductor HeterostructuresSemiconductor PhysicsCharge TrappingCharge TrapsHeterojunction DevicesInterface TrapsSpace-charge-limited CurrentTrap StatesTrapping EffectsTraps
A comparison of gated and ungated heterostructure FETs shows that high output conductance, poor pinchoff, and kinks in the I-V characteristics of heterojunction FETs (HFETs) are related to space-charge-limited conduction (SCLC) associated with deep traps in the substrate. The dominant trap level was determined from I-V measurements of an ungated structure as a function of temperature and the trap density was determined from SCLC characteristics. Reduction in excess drain current can be achieved by using a high trap concentration substrate and by increasing the electron barrier between the channel and the substrate.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
9
A. M. Stoneham · Physics Bulletin · 1970 · 2.6K citations
Natural Sciences, Electrical Engineering, Materials Science +17
New MBE buffer used to eliminate backgating in GaAs MESFETs
F. W. Smith, A. R. Calawa, C.-L. Chen et al. · IEEE Electron Device Letters · 1988 · 623 citations