A compact model for NBTI degradation and recovery under use-profile variations and its application to aging analysis of digital integrated circuits

A neutral netlist of 10 combinational benchmark circuits and a target translator in FORTRAN

F. Brglez · Medical Entomology and Zoology · 1985 · 1.3K citations

Logic Synthesis, Neutral Netlist, Engineering +13

A survey of power estimation techniques in VLSI circuits

Farid N. Najm · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1994 · 665 citations

Engineering, Vlsi Design, Energy Efficiency +16

Impact of NBTI on the temporal performance degradation of digital circuits

Bipul C. Paul, Kunhyuk Kang, Haldun Küflüoğlu et al. · IEEE Electron Device Letters · 2005 · 285 citations

Engineering, Vlsi Design, Computer Architecture +19

Berkeley reliability tools-BERT

R. Tu, Elyse Rosenbaum, Wayne Chan et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1993 · 196 citations

Software Maintenance, Software Reliability Testing, Engineering +25

Analytic modeling of the bias temperature instability using capture/emission time maps

Tibor Grasser, P.-J. Wagner, H. Reisinger et al. · 2011 · 175 citations

Engineering, Earth Science, Reliability Engineering +18