Field-Effect Mobility of InAs Surface Channel nMOSFET With Low <inline-formula> <tex-math notation="LaTeX">$D_{\rm it}$ </tex-math></inline-formula> Scaled Gate-Stack

Concepts

EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsComplementary Metal-oxide-semiconductor TechnologyDevice CharacterizationDevice ScalingMetal-oxide-semiconductor Field-effect TransistorsSemiconductor InterfacesSemiconductor PhysicsDevice Scaling EffectsGate-dependent Current-voltage BehaviorSurface Channel DevicesThreshold VoltageVoltage

Abstract

Frequency (100 Hz ≤ f ≤ 1 MHz) and temperature (-50 ≤ T 20 °C) characteristics of low interface state density D it high-κ gate-stacks on n-InAs have been investigated. Capacitance-voltage (C-V) curves exhibit typical accumulation/depletion/inversion behavior with midgap D it of 2 × 10 11 and 4 × 10 11 cm -2 eV -1 at -50 °C and 20 °C, respectively. Asymmetry of low-frequency C-V curves and C-T dependence for negative voltage showing a sharp transition of ≅-20 dB/decade between low- and high-frequency behavior indicate surface inversion. An inversion carrier activation energy and an InAs hole lifetime of 0.32 eV and 2 ns have been extracted, respectively. Surface channel nMOSFETs with gate length L g = 1 μm, channel thickness = 10 nm, and equivalent oxide thickness (EOT) 1 ≤ EOT ≤ 1.6 nm have been fabricated. For EOT = 1 nm, a subthreshold swing S = 65 mV/decade, transconductance g m = 1.6 mS/μm, and ON-current I ON = 426 μA/μm at an OFF-current I OFF = 100 nA/μm (supply voltage V dd = 0.5 V) have been measured. Peak electron field-effect mobilities of 6000-7000 cm 2 /Vs at sheet electron densities of 2-3 × 10 12 cm -2 were obtained for EOT as small as 1 nm.