Interface Trap Reduction

Interface Trap Reduction is a surface passivation strategy that specifically targets the minimization of electronic defect states at the semiconductor-dielectric interface, thereby enhancing carrier lifetime and interfacial electronic quality.

197

Publications

6.8K

Citations

977

Authors

256

Institutions

Publications per year

2017–2026

58

Authors

977

  1. ST
    Shinichi Takagi

    The University of Tokyo, Japan

    8 publications · 374 citations

    8

    h-index

  2. MT
    Mitsuru Takenaka

    The University of Tokyo, Japan

    6 publications · 306 citations

    6

    h-index

  3. NT
    Noriyuki Taoka

    The University of Tokyo, Japan

    4 publications · 282 citations

    4

    h-index

  4. HY
    Hiroshi Yano

    Nara Institute of Science and Technology, Japan

    4 publications · 188 citations

    4

    h-index

  5. DO
    Dai Okamoto

    National Institute of Advanced Industrial Science and Technology, Japan

    3 publications · 172 citations

    3

    h-index

1–5 of 977

Venues

  1. Applied Physics Letters

    35 publications · 2.1K citations

    24

    h-index

  2. Journal of Applied Physics

    18 publications · 538 citations

    15

    h-index

  3. IEEE Transactions on Electron Devices

    15 publications · 432 citations

    13

    h-index

  4. IEEE Electron Device Letters

    14 publications · 515 citations

    12

    h-index

  5. Applied Physics Express

    APEX · 8 publications · 242 citations

    8

    h-index

1–5