Applied Physics Letters · 2007 · 166 citations · 12 references
EngineeringMaterials EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDefects In Electronic MaterialsDislocations In SemiconductorsEtching ProcessesIii-v SemiconductorsSemiconductor DefectsSemiconductor InterfacesEtchingIntegration Of Iii-v MaterialsInterface Trap ReductionLattice MismatchLattice Mismatch EffectsPhotolithographyReactive Ion EtchingSilicon
Defect-free germanium has been demonstrated in SiO2 trenches on silicon via Aspect Ratio Trapping, whereby defects arising from lattice mismatch are trapped by laterally confining sidewalls. Results were achieved through a combination of conventional photolithography, reactive ion etching of SiO2, and selective growth of Ge as thin as 450nm. Full trapping of dislocations originating at the Ge∕Si interface has been demonstrated for trenches up to 400nm wide without the additional formation of defects at the sidewalls. This approach shows great promise for the integration of Ge and/or III-V materials, sufficiently large for key device applications, onto silicon substrates.
12