A. Chou

Record RF performance of 45-nm SOI CMOS Technology

Sungjae Lee, B. Jagannathan, Shreesh Narasimha et al. · 2007 · 179 citations

Engineering, Electrical Engineering, Microelectronics +16

Hybrid-orientation technology (HOT): opportunities and challenges

Min Yang, V. Chan, K. Chan et al. · IEEE Transactions on Electron Devices · 2006 · 169 citations

Engineering, Electrical Engineering, Materials Science +17

Performance dependence of CMOS on silicon substrate orientation for ultrathin oxynitride and HfO₂ gate dielectrics

Min Yang, E. P. Gusev, M. Ieong et al. · IEEE Electron Device Letters · 2003 · 166 citations

Engineering, Electrical Engineering, Materials Science +17

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing

Haining Yang, R. Malik, Y. Li et al. · 2005 · 142 citations

Engineering, Electrical Engineering, Manufacturing Engineering +11

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Computer Engineering, Electrical Engineering +17