V. Chan - Concepedia

Author

V. Chan

Also Known As

Chan, Victor, V. Chan, V.T. Chan, V.W. Chan, V.W.C. Chan, Varin Chan, Victor Chan, Victor W. C. Chan, Victor Wing Chung Chan, Vivian Jia Weng Chan

Publications

Citations

H-Index

Concepts

All Affiliations

IBM (United States)IBM Research - Thomas J. Watson Research Center Hong Kong University of Science and Technology IBM Research - Zurich Samsung (South Korea)

About

V. Chan is an author at IBM (United States) specializing in engineering, electrical engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	21	29	1.7K
2	Applied Physics	14	15	787
3	Social Sciences	2	2	181
4	Biostatistics	1	1	36
5	Cognitive Science	1	1	13

V. Chan

Publications

1.9K

Citations

H-Index

Page 1

	Year	Citations
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference Manuel Le Gallo, Riduan Khaddam-Aljameh, Miloš Stanisavljević, Nature Electronics EngineeringHardware AccelerationComputer EngineeringComputer ArchitectureComputer Science	2023	234
An analog-AI chip for energy-efficient speech recognition and transcription Stefano Ambrogio, Pritish Narayanan, Atsuya Okazaki, Nature	2023	185
Hybrid-orientation technology (HOT): opportunities and challenges Min Yang, V. Chan, K. Chan, IEEE Transactions on Electron Devices EngineeringSilicon MosfetsSilicon On InsulatorAdvanced DesignSocial Sciences	2006	168
Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing Haining Yang, R. Malik, Y. Li, Electrical EngineeringPhysical Design (Electronics)EngineeringVlsi DesignAdvanced Packaging (Semiconductors)	2005	142
HERMES-Core—A 1.59-TOPS/mm<sup>2</sup> PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs Riduan Khaddam-Aljameh, Miloš Stanisavljević, Jordi Fornt, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringVlsi DesignAffine ScalingImc Cores	2022	120
HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing Riduan Khaddam-Aljameh, Miloš Stanisavljević, Jordi Fornt, EngineeringVlsi DesignEnergy EfficiencyComputer ArchitectureHermes Core	2021	110
Effects of fog on the bit-error rate of a free-space laser communication system Brian Strickland, M. J. Lavan, Eric L. Woodbridge, Applied Optics	1999	100
High performance CMOS fabricated on hybrid substrate with different crystal orientations Min Yang, M. Ieong, L. Shi, Electrical EngineeringSemiconductor DeviceEngineeringAdvanced Packaging (Semiconductors)Microfabrication	2004	89
High performance and low power transistors integrated in 65nm bulk CMOS technology Zuying Luo, An Steegen, M. Eller, Low-power ElectronicsLow Power ApplicationsElectrical EngineeringEngineeringVlsi Design	2005	81
High speed 45nm gate length CMOSFETs integrated into a 90nm bulk technology incorporating strain engineering V. Chan, R. Rengarajan, N. Rovedo, High Speed 45NmElectrical EngineeringGate LengthEngineeringAdvanced Packaging (Semiconductors)	2004	76

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