M. Ieong

Three-dimensional integrated circuits

Anna W. Topol, Douglas Charles La Tulipe, Liang Shi et al. · IBM Journal of Research and Development · 2006 · 699 citations

Engineering, Device Integration, Stacked Layers +21

Silicon Device Scaling to the Sub-10-nm Regime

M. Ieong, B. Doris, J. Kedzierski et al. · Science · 2004 · 564 citations

Device Speed, Electrical Engineering, Silicon Device Scaling +13

FinFET design considerations based on 3-D simulation and analytical modeling

Guangsheng Pei, J. Kedzierski, Phil Oldiges et al. · IEEE Transactions on Electron Devices · 2002 · 296 citations

Device Modeling, Electrical Engineering, Physical Design (Electronics) +14

Extension and source/drain design for high-performance finFET devices

J. Kedzierski, M. Ieong, E. Nowak et al. · IEEE Transactions on Electron Devices · 2003 · 244 citations

Low-power Electronics, Extension Implants, Electrical Engineering +14

Comparison of raised and Schottky source/drain MOSFETs using a novel tunneling contact model

M. Ieong, P. M. Solomon, S.E. Laux et al. · 2002 · 188 citations

Device Modeling, Electrical Engineering, Schottky Barrier Height +12