B. Doris

Silicon Device Scaling to the Sub-10-nm Regime

M. Ieong, B. Doris, J. Kedzierski et al. · Science · 2004 · 564 citations

Device Speed, Electrical Engineering, Silicon Device Scaling +13

A Comparative Study of NBTI and PBTI (Charge Trapping) in SiO2/HfO2 Stacks with FUSI, TiN, Re Gates

Sufi Zafar, Y. Kim, Vijay Narayanan et al. · 2006 · 200 citations

Engineering, Silicon On Insulator, Semiconductor Device +17

Extreme scaling with ultra-thin Si channel MOSFETs

B. Doris, M. Ieong, T. Kanarsky et al. · 2003 · 181 citations

Electrical Engineering, Engineering, Technology Scaling +8

Mapping of Electrostatic Potential in Deep Submicron CMOS Devices by Electron Holography

M. Gribelyuk, Martha R. McCartney, Jing Li et al. · Physical Review Letters · 2002 · 106 citations

Engineering, Microscopy, Charge Transport +17

Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications

Kangguo Cheng, A. Khakifirooz, P. Kulkarni et al. · 2009 · 104 citations

Low-power Electronics, Electrical Engineering, Sige Rsd +12