Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications

Kangguo Cheng, A. Khakifirooz, P. Kulkarni, +33

Low-power ElectronicsElectrical EngineeringSige RsdEngineeringVlsi Design +10

A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI

Kwangyou Seo, Bala Haran, Divya Gupta, +81

EngineeringVlsi DesignFinfet TechnologyIntegrated CircuitsWafer Scale Processing +16

High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond

Qianlong Liu, M. Vinet, J. Gimbert, +36

Semiconductor TechnologyElectrical EngineeringGate LengthEngineeringVlsi Design +13

Ultra-thin-body and BOX (UTBB) fully depleted (FD) device integration for 22nm node and beyond

Qijiong Liu, A. Yagishita, N. Loubet, +34

Low-power ElectronicsDevice ModelingElectrical EngineeringUtbb StructureEngineering +13

FINFET technology featuring high mobility SiGe channel for 10nm and beyond

Dechao Guo, G. Karve, Gen Tsutsui, +50

EngineeringVlsi DesignDevice IntegrationFinfet TechnologyIntegrated Circuits +14

Large-scale relativistic configuration-interaction calculation of the 2s^{2} ^{1}S_{0}–2s2p ^{3}P_{1} intercombination transition in C III

M. Chen, Kangguo Cheng, W. R. Johnson

Physical Review A

EngineeringTheoretical High-energy PhysicComputational ChemistryChemistryElectronic Structure +19

Fully depleted SOI (FDSOI) technology

Kangguo Cheng, A. Khakifirooz

Science China Information Sciences

Electrical EngineeringEngineeringAdvanced Packaging (Semiconductors)Flash MemoryComputer Engineering +4

UTBB FDSOI transistors with dual STI for a multi-V<inf>t</inf> strategy at 20nm node and below

L. Grenouillet, M. Vinet, J. Gimbert, +39

Electrical EngineeringUtbb Fdsoi TransistorsEngineeringVlsi DesignVlsi Architecture +9

Application of high pressure deuterium annealing for improving the hot carrier reliability of CMOS transistors

Jinju Lee, Kangguo Cheng, Zhi Chen, +6

IEEE Electron Device Letters

Electrical EngineeringEngineeringNanoelectronicsCmos TransistorsBias Temperature Instability +11

Impact of back bias on ultra-thin body and BOX (UTBB) devices

Q. Liu, F. Monsieur, Arvind Kumar, +39

V BbElectrical EngineeringBiomedical SensorsEngineeringBack Bias +11