IEEE Transactions on Electron Devices · 2018 · 22 citations · 15 references
EngineeringElectrical EngineeringMicroelectronicsPower ElectronicsSemiconductor DevicesCurrent-voltage CharacteristicsDevice ModelingDevice SimulationField-effect TransistorsMetal-oxide-semiconductor Field-effect TransistorsSemiconductor PhysicsCharge TransportDeep DepletionJunction Field-effect TransistorsMetal-oxide-semiconductor Field-effect Transistor ModelingNanowire Field-effect TransistorsNanowire TransistorsRadiation-hard DevicesRadiation-hard Electronics
We present a unified charge-based model for double-gate and cylindrical architectures of junction field-effect transistors (JFETs). The central concept is to consider the JFET as a junctionless FET (JLFET) with an infinitely thin insulating layer, leading to analytical expressions between charge densities, current, and voltages without any fitting parameters. Assessment of the model with numerical technology computer-aided design simulations confirms that holding the JFET as a special case of the JLFET is justified in all the regions of operation, i.e., from deep depletion to flat-band and from linear to saturation.
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Nanowire transistors without junctions
Jean-Pierre Colinge, Chi‐Woo Lee, Aryan Afzalian et al. · Nature Nanotechnology · 2010 · 2.4K citations
Jean-Pierre Colinge · Solid-State Electronics · 2004 · 936 citations
Quantum-mechanical effects on the threshold voltage of ultrathin-SOI nMOSFETs
Yasuhisa Ōmura, S. Horiguchi, M. Tabe et al. · IEEE Electron Device Letters · 1993 · 275 citations