Ali Saeidi

Ferroelectric gating of two-dimensional semiconductors for the integration of steep-slope logic and neuromorphic devices

Sadegh Kamaei, Xia Liu, Ali Saeidi et al. · Nature Electronics · 2023 · 117 citations · Full text

Semiconductors, Electrical Engineering, Engineering +10

Double-Gate Negative-Capacitance MOSFET With PZT Gate-Stack on Ultra Thin Body SOI: An Experimentally Calibrated Simulation Study of Device Performance

Ali Saeidi, Farzan Jazaeri, Igor Stolichnov et al. · IEEE Transactions on Electron Devices · 2016 · 96 citations · Full text

Device Modeling, Low-power Electronics, Electrical Engineering +14

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Ali Saeidi, Farzan Jazaeri, Francesco Bellando et al. · IEEE Electron Device Letters · 2017 · 90 citations · Full text

Device Modeling, Terminals Tfets, Electrical Engineering +12

Nanowire Tunnel FET with Simultaneously Reduced Subthermionic Subthreshold Swing and Off-Current due to Negative Capacitance and Voltage Pinning Effects

Ali Saeidi, Teodor Rosca, Elvedin Memišević et al. · Nano Letters · 2020 · 88 citations · Full text

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Ali Saeidi, Arnab Biswas, Adrian Ionescu · Solid-State Electronics · 2016 · 64 citations · Full text

Non-volatile Memory, Electrical Engineering, Engineering +6