IEEE Solid-State Circuits Society Newsletter · 2007 · 302 citations · 5 references
EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingDevice ScalingIntegrated Circuit DesignNanoelectronicsPhysical DesignCmos ScalingDennard ScalingDevice Scaling EffectsPower Density ScalingScaling TheoryTechnology ScalingTransistor ScalingTransistor Sizing
The MOSFET scaling principles for obtaining simultaneous improvements in transistor density, switching speed, and power dissipation described by Robert H. Dennard and others in "Design of Ion-implanted MOSFETs with Very Small Physical Dimensions" (1974 ) became a roadmap for the semiconductor industry to provide systematic and predictable transistor improvements. New technology generations emerging approximately every three years during the 1970's and 1980's and appearing every other year starting in the mid-1990's, promise to continue although we face growing challenges.
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Interconnect scaling-the real limiter to high performance ULSI
M. Bohr · 2002 · 549 citations
Delaying forever: Uniaxial strained silicon transistors in a 90nm CMOS technology
K. Mistry, M Armstrong, C. Auth et al. · 2004 · 153 citations
Engineering, Computer Engineering, Electrical Engineering +14
CMOS devices below 0.1 μm: how high will performance go?
Yuan Taur, E. Nowak · 2002 · 99 citations
Engineering, Computer Engineering, Electrical Engineering +12