Technology Scaling

Technology Scaling is a semiconductor fabrication advancement strategy that reduces the physical dimensions of transistors and interconnects in integrated circuits to enhance performance, power efficiency, and device density.

1.3K

Publications

73.4K

Citations

4.4K

Authors

690

Institutions

Publications per year

2017–2026

275

Authors

4.4K

  1. JR
    Julien Ryckaert

    IMEC, Belgium

    19 publications · 983 citations

    16

    h-index

  2. KR
    Kaushik Roy

    Purdue University West Lafayette, United States

    19 publications · 684 citations

    16

    h-index

  3. DV
    Diederik Verkest

    IMEC, Belgium

    14 publications · 623 citations

    14

    h-index

  4. MB
    M. Bohr

    Intel (United States), United States

    12 publications · 1.7K citations

    12

    h-index

  5. HP
    H.‐S. Philip Wong

    Stanford University, United States

    12 publications · 1.9K citations

    12

    h-index

1–5 of 4.4K

Venues

  1. IEEE Transactions on Electron Devices

    60 publications · 4.6K citations

    35

    h-index

  2. IEEE Journal of Solid-State Circuits

    26 publications · 2.3K citations

    22

    h-index

  3. Proceedings of the IEEE

    29 publications · 2.9K citations

    21

    h-index

  4. 20

    h-index

  5. 15

    h-index

1–5