M Armstrong

A 90-nm logic technology featuring strained-silicon

Scott E. Thompson, M Armstrong, C. Auth et al. · IEEE Transactions on Electron Devices · 2004 · 666 citations

Engineering, Electrical Engineering, Materials Science +17

A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors

T. Ghani, M Armstrong, C. Auth et al. · 2004 · 561 citations

Engineering, Computer Engineering, Electrical Engineering +17

A Logic Nanotechnology Featuring Strained-Silicon

Scott E. Thompson, M Armstrong, C. Auth et al. · IEEE Electron Device Letters · 2004 · 513 citations

Engineering, Electrical Engineering, Materials Science +17

Comparison of Junctionless and Conventional Trigate Transistors With $L_{g}$ Down to 26 nm

R. Rios, A. Cappellani, M Armstrong et al. · IEEE Electron Device Letters · 2011 · 335 citations

Engineering, Electrical Engineering, Electronic Materials +10

A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 μm/sup 2/ SRAM cell

Scott E. Thompson, N. Anand, M Armstrong et al. · 2003 · 243 citations

Engineering, Computer Engineering, Electrical Engineering +17