Relaxable damage in hot-carrier stressing of n-MOS transistors-oxide traps in the near interfacial region of the gate oxide

Abstract

An examination of the relaxable hot-carrier stressing damage indicates that the relaxation is due to charge trapped in the oxide located within tunneling distance of the Si-SiO/sub 2/ interface, which charges during stressing and discharges by tunneling back out into the silicon. Both hole and electron traps are involved. The traps can be filled, either by injecting charge into the oxide by channel hot-carrier stressing, or by applying a strong bias to the gate (+or-4 MV/cm), with the drain grounded so that electrons/holes tunnel in from the silicon. The relaxable states can thus be thought of as constituting a third type of stress-induced defect, having some of the characteristics of both interface states and oxide trapped charge. They are found to be created for the stressing conditions around V/sub g/=V/sub d//4, indicating that they are generated by hot hole injection. The sites, which appear to be situated at fixed distances into the oxide from the interface, are created obeying a time power law with gradient 0.3. Athough the relaxable states typically make up about 5-20% of the total hot carrier damage, they may be of some importance as they could be the precursors to interface states.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>