J.-C. Marchetaux

Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2<or=V/sub g/>or=V/sub d/) during hot-carrier stressing of n-MOS transistors

Barry M. Doyle, Marc Bourcerie, J.-C. Marchetaux et al. · IEEE Transactions on Electron Devices · 1990 · 237 citations

Materials Engineering, Semiconductor Technology, Electrical Engineering +13

Relaxable damage in hot-carrier stressing of n-MOS transistors-oxide traps in the near interfacial region of the gate oxide

Marc Bourcerie, B.S. Doyle, J.-C. Marchetaux et al. · IEEE Transactions on Electron Devices · 1990 · 41 citations

Engineering, Silicon On Insulator, Semiconductor Device +16

Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging

J.-C. Marchetaux, Marc Bourcerie, A. Boudou et al. · IEEE Electron Device Letters · 1990 · 30 citations

Device Modeling, Electrical Engineering, Semiconductor Device +14

A coupled study by floating-gate and charge-pumping techniques of hot carrier-induced defects in submicrometer LDD n-MOSFET's

D. Vuillaume, J.-C. Marchetaux, Pierre‐Emmanuel Lippens et al. · IEEE Transactions on Electron Devices · 1993 · 29 citations

Device Modeling, Semiconductor Technology, Electrical Engineering +14

Evidence of acceptor-like oxide defects created by hot-carrier injection in n-MOSFET's: a charge-pumping study

D. Vuillaume, J.-C. Marchetaux, A. Boudou · IEEE Electron Device Letters · 1991 · 28 citations

Electrical Engineering, Acceptor-like Oxide Defects, Charge-pumping Study +12