Barry M. Doyle

Benchmarking Nanotechnology for High-Performance and Low-Power Logic Transistor Applications

Suman Datta, M. Doczy, Barry M. Doyle et al. · IEEE Transactions on Nanotechnology · 2005 · 639 citations

Device Modeling, Electrical Engineering, Electronic Devices +12

High-<tex>$kappa$</tex>/Metal–Gate Stack and Its MOSFET Characteristics

R. Chau, Suman Datta, M. Doczy et al. · IEEE Electron Device Letters · 2004 · 465 citations

Electrical Engineering, Engineering, Physics +10

Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2<or=V/sub g/>or=V/sub d/) during hot-carrier stressing of n-MOS transistors

Barry M. Doyle, Marc Bourcerie, J.-C. Marchetaux et al. · IEEE Transactions on Electron Devices · 1990 · 237 citations

Materials Engineering, Semiconductor Technology, Electrical Engineering +13

Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering

J. Kavalieros, Barry M. Doyle, Suman Datta et al. · 2006 · 220 citations

Semiconductor Technology, Electrical Engineering, Metal Gate Electrodes +11

Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout

Barry M. Doyle, B. I. Boyanov, Suman Datta et al. · 2004 · 219 citations

Device Modeling, Electrical Engineering, Physical Design (Electronics) +11