Interface state creation and charge trapping in the medium-to-high gate voltage range (V/sub d//2<or=V/sub g/>or=V/sub d/) during hot-carrier stressing of n-MOS transistors

Abstract

The conditions of hot-carrier stressing of n-MOS transistors have been studied in order to investigate the types of damage arising from the stressing in the gate voltage range V/sub d//2>or=V/sub g/>or=V/sub d/. Although a maximum in the V/sub t/ degradation is seen at V/sub g/=V/sub d//2, considerable stress damage occurs at higher gate voltages (at and around V/sub g/=V/sub d/). This stress damage obeys a different power law as a function of time than that which is seen at V/sub g/=V/sub d//2. Examination of the damage using dynamic stress experiments and alternate static injection phases suggests that the oxide-trapped charge (N/sub ox/) is mostly responsible for the damage at V/sub g/=V/sub d/, whereas the degradation at V/sub g/=V/sub d//2 arises from the interface state (N/sub ss/) creation. An examination of the gate current conditions shows that the oxide traps are created under conditions of maximum electronic gate current, suggesting that the hot electrons are responsible for the damage. Analysis of the time evolution of the damage suggests that the two types of damage (N/sub ox/ and N/sub ss/) can be seen during a single stressing, depending on the stress voltage conditions.<<ETX>>