Factors Influencing the Leakage Current in Embedded SiGe Source/Drain Junctions

Abstract

This paper studies the leakage current components in embedded Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> ,Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> , source/drain (S/D) p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -n junctions, with different Ge contents, varying between 20% and 35%. In addition, the impact of performing a highly doped drain (HDD) implantation before or after the selective epitaxial deposition of in situ highly B-doped S/D layers is investigated. It is shown that the lowest junction leakage is obtained for the post-epi HDD condition, and moreover, for the smallest active area size. As pointed out, this dependence is related with a window-size-dependent strain relaxation, induced by the ion-implantation-related defects.