Andriy Hikavyy

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

Hans Mertens, R. Ritzenthaler, Andriy Hikavyy et al. · 2016 · 192 citations

Engineering, Si Nws, Bulk Si Substrates +16

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

Hans Mertens, R. Ritzenthaler, Adrian Chasin et al. · 2016 · 149 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +15

Fabrication and Analysis of a ${\rm Si}/{\rm Si}_{0.55}{\rm Ge}_{0.45}$ Heterojunction Line Tunnel FET

A. Walke, A. Vandooren, R. Rooyackers et al. · IEEE Transactions on Electron Devices · 2014 · 144 citations

Trap-assisted Tunneling, Engineering, Integrated Circuits +16

Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs

A. Vandooren, Daniele Leonelli, R. Rooyackers et al. · Solid-State Electronics · 2013 · 140 citations

Trap-assisted Tunneling, Electrical Engineering, Sige Hetero-junction Tunnel-fets +9

First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers

S. Subramanian, M. Reza Hosseini, T. Chiarella et al. · 2020 · 109 citations

Engineering, N14 Platform, Interconnect (Integrated Circuits) +16