Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

Abstract

We report on gate-all-around (GAA) n- and p-MOSFETs made of 8-nm-diameter vertically stacked horizontal Si nanowires (NWs). We show that these devices, which were fabricated on bulk Si substrates using an industry-relevant replacement metal gate (RMG) process, have excellent short-channel characteristics (SS = 65 mV/dec, DIBL = 42 mV/V for L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> = 24 nm) at performance levels comparable to finFET reference devices. The parasitic channels below the Si NWs were effectively suppressed by ground plane (GP) engineering.