G. Mannaert

Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates

Hans Mertens, R. Ritzenthaler, Andriy Hikavyy et al. · 2016 · 198 citations

Engineering, Electrical Engineering, Materials Science +17

Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates

Hans Mertens, R. Ritzenthaler, Adrian Chasin et al. · 2016 · 161 citations

Engineering, Electrical Engineering, Materials Science +17

Au-Free AlGaN/GaN Power Diode on 8-in Si Substrate With Gated Edge Termination

Silvia Lenci, Brice De Jaeger, L. Carbonell et al. · IEEE Electron Device Letters · 2013 · 140 citations

Engineering, Electrical Engineering, Materials Science +17

First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers

S. Subramanian, M. Reza Hosseini, T. Chiarella et al. · 2020 · 119 citations

Engineering, Electrical Engineering, Microelectronics +16

Vertically Stacked Gate-All-Around Si Nanowire CMOS Transistors with Reduced Vertical Nanowires Separation, New Work Function Metal Gate Solutions, and DC/AC Performance Optimization

R. Ritzenthaler, Hans Mertens, V. Peña et al. · 2018 · 98 citations

Engineering, Electrical Engineering, Materials Science +17