R. Rooyackers

Fabrication and Analysis of a ${\rm Si}/{\rm Si}_{0.55}{\rm Ge}_{0.45}$ Heterojunction Line Tunnel FET

A. Walke, A. Vandooren, R. Rooyackers et al. · IEEE Transactions on Electron Devices · 2014 · 147 citations

Engineering, Electrical Engineering, Materials Engineering +16

Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs

A. Vandooren, Daniele Leonelli, R. Rooyackers et al. · Solid-State Electronics · 2013 · 142 citations

Engineering, Electrical Engineering, Materials Engineering +13

Impact of Line-Edge Roughness on FinFET Matching Performance

Emanuele Baravelli, Abhisek Dixit, R. Rooyackers et al. · IEEE Transactions on Electron Devices · 2007 · 141 citations

Engineering, Computer Engineering, Electrical Engineering +17

Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source

F. S. Neves, Paula Ghedini Der Agopian, João Antônio Martino et al. · IEEE Transactions on Electron Devices · 2016 · 125 citations

Engineering, Electrical Engineering, Analog Electronics +14

Drain voltage dependent analytical model of tunnel field-effect transistors

Anne S. Verhulst, Daniele Leonelli, R. Rooyackers et al. · Journal of Applied Physics · 2011 · 124 citations

Engineering, Electrical Engineering, Materials Science +17