Abhisek Dixit

Analysis of the Parasitic S/D Resistance in Multiple-Gate FETs

Abhisek Dixit, Anil Kottantharayil, Nadine Collaert et al. · IEEE Transactions on Electron Devices · 2005 · 354 citations

Device Modeling, Electrical Engineering, Selective Epitaxial Growth +10

Impact of Line-Edge Roughness on FinFET Matching Performance

Emanuele Baravelli, Abhisek Dixit, R. Rooyackers et al. · IEEE Transactions on Electron Devices · 2007 · 139 citations

Hardware Security, Finfet Matching Performance, Electrical Engineering +14

Impact of LER and Random Dopant Fluctuations on FinFET Matching Performance

Emanuele Baravelli, M. Jurczak, N. Speciale et al. · IEEE Transactions on Nanotechnology · 2008 · 104 citations

Device Modeling, Random Dopant Fluctuations, Electrical Engineering +12

FinFET analogue characterization from DC to 110GHz

Dimitri Lederer, Valeriya Kilchytska, Tamara Rudenko et al. · Solid-State Electronics · 2005 · 94 citations

Electrical Engineering, Finfet Analogue Characterization, Engineering +6

A Low-Power Multi-Gate FET CMOS Technology with 13.9ps Inverter Delay, Large-Scale Integrated High Performance Digital Circuits and SRAM

K. von Arnim, E. Augendre, A.C. Pacha et al. · 2007 · 76 citations

Low-power Electronics, Electrical Engineering, Engineering +11