Nickel-Silicided Schottky Junction CMOS Transistors With Gate-All-Around Nanowire Channels

E. J. Tan, K. L. Pey, Nandan Singh, G. Q. Lo, D. Z., Y. K. Chin, Lei Tang, Pooi See Lee, C. K. F. Ho

IEEE Electron Device Letters · 2008 · 23 citations · 15 references

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Abstract

We demonstrate high-performance Schottky CMOS transistors with NiSi source/drain and gate-all-around (GAA) silicon nanowire (~5 nm) channels. The transistors exhibit good <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> / <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> characteristics, along with fully controlled shortchannel effects revealed by low drain-induced barrier lowering (~10 mV/V) and near-ideal subthreshold swing (~60 mV/dec). Although the N-MOSFET required dopant segregation to suppress the ambipolar behavior, excellent P-MOSFET characteristics could be achieved without the use of barrier modification techniques. We attribute this to the Schottky barrier thinning in a nanosized metal-semiconductor junction and superior gate electrostatic control in a GAA nanowire architecture.

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