Navab Singh

High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices

Navab Singh, Ajay Agarwal, L. K. Bera et al. · IEEE Electron Device Letters · 2006 · 639 citations

Engineering, Electrical Engineering, Materials Science +17

Silicon Nanowire Arrays for Label-Free Detection of DNA

Zhiqiang Gao, Ajay Agarwal, A. D. Trigg et al. · Analytical Chemistry · 2007 · 428 citations

Engineering, Bioengineering, Biotechnology +17

Vertical Si-Nanowire <formula formulatype="inline"><tex Notation="TeX">$n$</tex></formula>-Type Tunneling FETs With Low Subthreshold Swing (<formula formulatype="inline"><tex Notation="TeX">$\leq \hbox{50}\ \hbox{mV/decade}$</tex> </formula>) at Room Temperature

Ramanathan Gandhi, Zhixian Chen, Navab Singh et al. · IEEE Electron Device Letters · 2011 · 331 citations

Engineering, Electrical Engineering, Materials Science +17

Reconfigurable MEMS Fano metasurfaces with multiple-input–output states for logic operations at terahertz frequencies

Manukumara Manjappa, Prakash Pitchappa, Navab Singh et al. · Nature Communications · 2018 · 292 citations · Full text

Engineering, Electrical Engineering, Materials Science +17

Vertical Silicon-Nanowire Formation and Gate-All-Around MOSFET

Bing Yang, Kavitha D. Buddharaju, Selin Hwee-Gee Teo et al. · IEEE Electron Device Letters · 2008 · 232 citations

Engineering, Electrical Engineering, Materials Science +17