A comparative study of advanced MOSFET concepts

C. Wann, K. Noda, Tetsu Tanaka, +2

IEEE Transactions on Electron Devices

Device ModelingElectrical EngineeringDifferent Mosfet StructuresEngineeringVlsi Design +13

25 nm CMOS design considerations

Yuan Taur, C. Wann, D.J. Frank

Low-power ElectronicsElectrical EngineeringPartially-depleted SoiEngineeringVlsi Design +11

Short-channel effect improved by lateral channel-engineering in deep-submicronmeter MOSFET's

Bin Yu, C. Wann, E.D. Nowak, +2

IEEE Transactions on Electron Devices

Device ModelingPocket ImplantElectrical EngineeringLdd MosfetEngineering +9

SRAM cell design for stability methodology

C. Wann, Robert Wong, David Frank, +9

Hardware SecurityNon-volatile MemoryElectrical EngineeringEngineeringSram Stability +9

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing

Haining Yang, R. Malik, Y. Li, +47

Electrical EngineeringPhysical Design (Electronics)EngineeringVlsi DesignAdvanced Packaging (Semiconductors) +11

Comprehensive Analysis of Short-Channel Effects in Ultrathin SOI MOSFETs

Qian Xie, Chia-Jung Lee, Jun Xu, +3

IEEE Transactions on Electron Devices

Device ModelingElectrical EngineeringEngineeringSubstrate BiasBias Temperature Instability +7

High performance and low power transistors integrated in 65nm bulk CMOS technology

Zuying Luo, An Steegen, M. Eller, +38

Low-power ElectronicsLow Power ApplicationsElectrical EngineeringEngineeringVlsi Design +10

High speed 45nm gate length CMOSFETs integrated into a 90nm bulk technology incorporating strain engineering

V. Chan, R. Rengarajan, N. Rovedo, +16

High Speed 45NmElectrical EngineeringGate LengthEngineeringAdvanced Packaging (Semiconductors) +13

An AC conductance technique for measuring self-heating in SOI MOSFET's

R. Tu, C. Wann, J.C. King, +2

IEEE Electron Device Letters

Device ModelingElectrical EngineeringEngineeringBias Temperature InstabilitySoi Mosfet +11

A 25-nm gate-length FinFET transistor module for 32nm node

Chang-Yun Chang, Tsung-Lin Lee, C. Wann, +37

Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignTechnology Scaling +9