V<sub>th</sub> adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit

Chih-Chao Yang, Jia‐Min Shieh, Tung-Ying Hsieh, Wen-Hsien Huang, Hsing-Hsiang Wang, Chang‐Hong Shen, Tsung‐Ta Wu, Chun-Yuan Chen, Kuei‐Shu Chang‐Liao, Jung-Hau Shiu,

2014 · 11 citations · 10 references

Concepts

Abstract

3D stackable high-performance Si nanowire field-effect transistors (NWFETs) and dopant-free Ge junctionless nanowire non-volatile memories (JL-NWNVMs) with self-aligned embedded source/drain (S/D) current boosters and independent back gate (BG) V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> adjusters for 3D sequential integrated circuit are realized by low thermal budget process (<;450°C). The fabricated Si NWFETs exhibit low subthreshold swings (96 and 125 mV/dec.), high on-currents (232 and 110 μA/μm), and large γ value (>0.05) for V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> adjustment. The high-Δ capped blocking dielectric bandgap engineered dopant-free Ge JL-NWNVM exhibits high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ratio (>10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> ), large memory window (>4V), and low charge loss (<;40%, 10yrs). Thanks to the quantum confinement effect, such V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> adjustable nanowire devices perform well at higher temperatures, which give a wide design window for 3D sequential integrated circuit.

References

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