Bipin Rajendran - Concepedia

Author

Bipin Rajendran

New Jersey Institute of Technology ORCID

Also Known As

B. Rajendran, Bipin Rajendran, Gallo, Manuel Le, Rajendran, Bipin, Rajendran, Bipin.

194

Publications

Citations

H-Index

133

Concepts

All Affiliations

New Jersey Institute of Technology Indian Institute of Technology Bombay IBM Research - Thomas J. Watson Research Center IBM Research - Zurich IBM (United States)

About

Bipin Rajendran is an author at New Jersey Institute of Technology specializing in engineering, computer engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	26	50	5.7K
2	Social Sciences	15	21	2.4K
3	Applied Physics	14	18	2.7K
4	Medicine	2	2	29
5	Natural Sciences	1	1	132

Bipin Rajendran

Publications

6.5K

Citations

H-Index

Page 1

	Year	Citations
Phase Change Memory H.‐S. Philip Wong, Simone Raoux, Sang‐Bum Kim, Proceedings of the IEEE Materials ScienceMaterials EngineeringElectrical EngineeringEngineeringApplied Physics	2010	1.7K
Neuromorphic computing with multi-memristive synapses Irem Boybat, Manuel Le Gallo, S. R. Nandakumar, Nature Communications EngineeringMemristive DevicesNeural NetworkMulti-memristive SynapsesComputer Architecture	2018	838
Accurate deep neural network inference using computational phase-change memory Vinay Joshi, Manuel Le Gallo, Simon Haefeli, Repository for Publications and Research Data (ETH Zurich)	2020	395
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons Jae-sun Seo, Bernard Brezzo, Yong Liu, EngineeringComputer ArchitectureLimited ScalabilityNeurochipSocial Sciences	2011	343
Memristors—From In‐Memory Computing, Deep Learning Acceleration, and Spiking Neural Networks to the Future of Neuromorphic and Bio‐Inspired Computing Adnan Mehonić, Abu Sebastian, Bipin Rajendran, Advanced Intelligent Systems Artificial IntelligenceArtificial Sensory SystemsEngineeringMachine LearningNeural Networks (Machine Learning)	2020	295
Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory T. Nirschl, C.-F. Chen, Eric Joseph, Hardware SecurityWrite StrategiesElectrical EngineeringNovel Integration SchemeEngineering	2007	273
Nanoscale electronic synapses using phase change devices Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, ACM Journal on Emerging Technologies in Computing Systems EngineeringCircuit NeuroscienceNanocomputingNanoscale Electronic SynapsesDevice Conductance	2013	162
A phase-change memory model for neuromorphic computing S. R. Nandakumar, Manuel Le Gallo, Irem Boybat, Journal of Applied Physics EngineeringConductance DriftEmerging Memory TechnologyComputer ArchitectureDevice Conductance	2018	162
Specifications of Nanoscale Devices and Circuits for Neuromorphic Computational Systems Bipin Rajendran, Yong Liu, Jae-sun Seo, IEEE Transactions on Electron Devices EngineeringNanocomputingNeurochipSocial SciencesConventional Cmos Implementations	2012	160
Spiking neural networks for handwritten digit recognition—Supervised learning and network optimization Shruti Kulkarni, Bipin Rajendran Neural Networks EngineeringNeuronal NetworkSpiking Neural NetworksNeuroscienceComputer Science	2018	158

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