Jae-sun Seo

Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks

Naveen Suda, Vikas Chandra, Ganesh Dasika et al. · 2016 · 548 citations

Convolutional Neural Network, Engineering, Machine Learning +16

XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks

Shihui Yin, Zhewei Jiang, Jae-sun Seo et al. · IEEE Journal of Solid-State Circuits · 2020 · 387 citations

Engineering, Machine Learning, Emerging Memory Technology +16

Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks

Yufei Ma, Yu Cao, Sarma Vrudhula et al. · 2017 · 381 citations

Loop Optimization Techniques, Convolutional Neural Network, Engineering +14

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons

Jae-sun Seo, Bernard Brezzo, Yong Liu et al. · 2011 · 343 citations

Engineering, Computer Architecture, Limited Scalability +17

Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA

Yufei Ma, Yu Cao, Sarma Vrudhula et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2018 · 338 citations

Convolutional Neural Network, Engineering, Machine Learning +16