Enhancement-mode metal–insulator–semiconductor GaN/AlInN/GaN heterostructure field-effect transistors on Si with a threshold voltage of +3.0 V and blocking voltage above 1000 V

Abstract

Enhancement-mode AlInN/GaN metal–insulator–semiconductor heterostructure field-effect transistors on silicon are reported. A fluorine-based plasma treatment and gate dielectric are employed, and the devices exhibit a threshold voltage of +3 V. A drain current density of 295 mA/mm for a gate bias of +10 V is measured. An excellent off-state blocking voltage capability of 630 V for a leakage current of 1 µA/mm, and over 1000 V for 10 µA/mm are achieved on a 20-µm-gate–drain separation device at gate bias of 0 V. The dynamic on-resistance is ~2.2 times the DC on-resistance when pulsing from an off-state drain bias of 500 V.