Improvement of mask write time for curvilinear assist features at 22nm

Abstract

In writing 22nm logic contacts with 193nm immersion, curvilinear sub-resolution assist features will be desirable on masks. Curvilinear sub-resolution assist features are good for high volume chips where the wafer volume outweighs considerations for mask write times. For those chips, even 40 hour write times are tolerated for mask writing. For lower-volume production of SOC designs, such write times are economically unacceptable. 8 to 12 hours of write times are feasible for these designs. Previous papers at 2010 Photomask Japan described model-based mask data preparation (MB-MDP) techniques using circular apertures on production e-beam writers writing curvilinear ideal ILT patterns that reduced e-beam write-times by nearly a factor of two over conventional approach writing Manhattanized ILT patterns. This puts the curvilinear assist features within the realm of high-volume production. However, the write times are still too long for SOC designs. This paper describes a new technique that reduces mask write time further. Resist-exposed SEM images will be shown, written by JEOL JBX-3200MV. E-beam shot count comparisons for an ideal ILT mask pattern will be made with the conventional methods, demonstrating a 44% decrease in blanking time. In addition, a comparison study is shown indicating that an ideal ILT mask pattern that would take 63 hours with conventional fracturing can be written in about 14 hours using MB-MDP. AIMS projected images demonstrate the pattern fidelity on the wafer.