2004 · 35 citations · 1 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyLeakage Power ReductionMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Device MaterialsShort-channel EffectsCmos ScalingDielectric BreakdownFermi Level PinningGate Dielectric EngineeringGate DielectricsGate OxidesHigh-k DielectricsMetal Gates
We have fabricated fully Ni-silicided metal gate (FUSI) CMOS devices with HfO2-based gate dielectrics for the first time. We demonstrate that full silicidation eliminates the Fermi level pinning at the polySi-HfO2 dielectric interface in pFETs. For nMOS devices, a 5 orders of magnitude reduction in short channel sub-threshold leakage is obtained with similar drive current compared to the poly gate devices. In addition, the FUSI process does not degrade the hysterisis nor the dielectric breakdown. This result makes FUSI on high-K a strong candidate for scaled low power technologies.
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