K.G. Anil

Work function of Ni silicide phases on HfSiON and SiO/sub 2/: NiSi, Ni/sub 2/Si, Ni/sub 31/Si/sub 12/, and Ni/sub 3/Si fully silicided gates

J. A. Kittl, Małgorzata Pawlak, A. Lauwers et al. · IEEE Electron Device Letters · 2005 · 71 citations

Materials Science, Electrical Engineering, Engineering +15

Performance improvement of tall triple gate devices with strained SiN layers

Nadine Collaert, A. De Keersgieter, K.G. Anil et al. · IEEE Electron Device Letters · 2005 · 49 citations

Electrical Engineering, Engineering, Vlsi Design +11

Impact of Stochastic Mismatch on Measured SRAM Performance of FinFETs with Resist/Spacer-Defined Fins: Role of Line-Edge-Roughness

Abhisek Dixit, K.G. Anil, Emanuele Baravelli et al. · 2006 · 42 citations

Spacer-defined Fin-patterning Results, Stochastic Mismatch, Electrical Engineering +14

A Functional 41-Stage Ring Oscillator Using Scaled FinFET Devices With 25-nm Gate Lengths and 10-nm Fin Widths Applicable for the 45-nm CMOS Node

Nadine Collaert, Abhisek Dixit, M. W. Goodwin et al. · IEEE Electron Device Letters · 2004 · 37 citations

Wider Fin Widths, Engineering, Physics +12

Ni fully silicided gates for 45nm CMOS applications

J. A. Kittl, A. Lauwers, Małgorzata Pawlak et al. · Microelectronic Engineering · 2005 · 36 citations

Electrical Engineering, Engineering, Vlsi Design +5