R. Hannon

3D copper TSV integration, testing and reliability

Mukta Farooq, Troy Graves-Abe, W. Landers et al. · 2011 · 107 citations

Engineering, Electrical Engineering, Materials Science +17

Integration of trench DRAM into a high-performance 0.18 μm logic technology with copper BEOL

S. Crowder, R. Hannon, H. Ho et al. · 2002 · 23 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 45 nm CMOS node Cu/Low-k/ Ultra Low-k PECVD SiCOH (k=2.4) BEOL Technology

S. Sankaran, S. Arai, R. Augur et al. · 2006 · 22 citations

Engineering, Electrical Engineering, Materials Science +17

Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment

G. Gaudin, G. Riou, Didier Landru et al. · 2010 · 17 citations

Engineering, Materials Engineering, Materials Science +15

Wafer-scale oxide fusion bonding and wafer thinning development for 3D systems integration: Oxide fusion wafer bonding and wafer thinning development for TSV-last integration

Spyridon Skordas, Douglas Charles La Tulipe, Kevin Winstel et al. · 2012 · 13 citations

Engineering, Electrical Engineering, Materials Science +15