High performance 14nm SOI FinFET CMOS technology with 0.0174µm<sup>2</sup> embedded DRAM and 15 levels of Cu metallization

C-H. Lin, B. Greene, J. Cai, +95

Scaling deep trench based eDRAM on SOI to 32nm and Beyond

G. Wang, D. Anand, Nauman Zafar Butt, +24

Electrical EngineeringEngineeringVlsi DesignDeep TrenchNanoelectronics +7

Integration of trench DRAM into a high-performance 0.18 μm logic technology with copper BEOL

S. Crowder, R. Hannon, H. Ho, +6

Electrical EngineeringEngineeringVlsi DesignMicrofabricationEmerging Memory Technology +13

Creation and interaction with large-scale domain-specific knowledge bases

S. Bharadwaj, Laura Chiticariu, Marina Danilevsky, +27

Proceedings of the VLDB Endowment

EngineeringKnowledge ExtractionSemantic TechnologySemantic WebText Mining +16

Large RF-controlled voltage steps in DC SQUIDs applicable to voltage standards and sources

G.S. Lee, H. Ho, R. Ruby, +1

IEEE Transactions on Applied Superconductivity

EngineeringCurrent HeightRadio FrequencyAnalog DesignQuantum Engineering +18

A 0.127 μm<sup>2</sup> High Performance 65nm SOI Based embedded DRAM for on-Processor Applications

G. Wang, K. Cheng, H. Ho, +31

Electrical EngineeringEngineeringVlsi DesignAdvanced Packaging (Semiconductors)Microfabrication +13

A 0.039um<sup>2</sup> high performance eDRAM cell based on 32nm High-K/Metal SOI technology

Nauman Zafar Butt, K. McStay, Alberto Cestero, +34

Non-volatile MemoryEngineeringVlsi DesignComputer ArchitectureHardware Security +14

Evaluating 2D Flow Visualization Using Eye Tracking

H. Ho, I‐Cheng Yeh, Yu‐Chi Lai, +2

Computer Graphics Forum

Real-time VisualizationEngineeringVisualization (Graphics)Data VisualizationVisualization (Data Visualization) +15

'System on a chip' technology platform for 0.18 μm digital, mixed signal and eDRAM applications

R. Mahnkopf, K.-H. Allers, M. Armacost, +37

EngineeringVlsi DesignAnalog DesignChip IntegrationComputer Architecture +16

A 0.13 μm high-performance SOI logic technology with embedded DRAM for system-on-a-chip application

H. Ho, Michael Steigerwalt, Brian Walsh, +10

Electrical EngineeringμM High-performance SoiEngineeringVlsi DesignPhysical Design (Electronics) +13