J. Cai

The effective drive current in CMOS inverters

Mulun Na, E. Nowak, Wilfried Haensch et al. · 2003 · 238 citations

Electrical Engineering, Cmos Inverter Delay, Engineering +8

High performance 14nm SOI FinFET CMOS technology with 0.0174µm<sup>2</sup> embedded DRAM and 15 levels of Cu metallization

C-H. Lin, B. Greene, J. Cai et al. · 2014 · 128 citations

22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL

P. Chang, C. Ortolland, David Fried et al. · 2012 · 89 citations

High-performance Soi Technology, Engineering, Vlsi Design +16

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

Siddarth Krishnan, U. Kwon, N. Moumen et al. · 2011 · 81 citations

Sige Channels, Low Power Applications, Engineering +16

Low field mobility characteristics of sub-100 nm unstrained and strained Si MOSFETs

K. Rim, M. Longstreet, A. Mocuta et al. · 2003 · 79 citations

Electrical Engineering, Engineering, Nanoelectronics +9