2012 · 89 citations · 0 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignDevice ScalingIntegrated Circuit DesignInterconnect DesignInterconnect TechnologyMemory Hierarchy DesignCarrier MobilityCharge Carrier MobilityHierarchical InterconnectsInterconnect FabricationMemory Circuit DesignMemory Hierarchy PerformanceOn-chip InterconnectsSelf-aligned Structures
We present a fully-integrated SOI CMOS 22nm technology for a diverse array of high-performance applications including server microprocessors, memory controllers and ASICs. A pre-doped substrate enables scaling of this third generation of SOI deep-trench-based embedded DRAM for a dense high-performance memory hierarchy. Dual-Embedded stressor technology including SiGe and Si:C for improved carrier mobility in both PMOS and NMOS FETs is presented for the first time. A hierarchical BEOL with 15 levels of copper interconnect including self-aligned via processing delivers high performance with exceptional reliability.